1. Field of the Invention
This invention relates to the field of multiprocessor computer systems and, more particularly, to communication within multiprocessor computer systems.
2. Description of the Related Art
Multiprocessing computer systems include two or more processors that may be employed to perform computing tasks. A particular computing task may be performed upon one processor while other processors perform unrelated computing tasks. Alternatively, components of a particular computing task may be distributed among multiple processors to decrease the time required to perform the computing task as a whole.
Various components within a multiprocessing computer system may communicate with each other during operation. For example, various components may participate in a communication protocol that involves sending and receiving communications. A popular architecture in commercial multiprocessing computer systems is a shared memory architecture in which multiple processors share a common memory. In shared memory multiprocessing systems, a cache hierarchy is typically implemented between the processors and the shared memory. In order to maintain the shared memory model, in which a particular address stores exactly one data value at any given time, the communication protocol implemented in shared memory multiprocessing systems include a coherency protocol. Generally speaking, an operation is coherent if the effects of the operation upon data stored at a particular memory address are reflected in each copy of the data within the cache hierarchy. For example, when data stored at a particular memory address is updated, the update may be supplied to the caches that are storing copies of the previous data. Alternatively, the copies of the previous data may be invalidated in the caches such that a subsequent access to the particular memory address causes the updated copy to be transferred from main memory or from a cache.
Communications sent between components of a multiprocessing computer system may include the address of data being accessed. The range of addressable space within a multiprocessing system may be large, and thus addresses may contain a significant number of bits. This may, in turn, increase the size of the communications sent between devices.